Design of the Low Noise Amplifier Circuit in Band L for Improve the Gain and Circuit Stability

Gain Noise Figure LNA Linearization L Band.

Authors

  • Arash Omidi
    arash_eng2020@Yahoo.com
    Department of Engineering, Isfahan University of Technology, Isfahan,, Iran, Islamic Republic of
  • Rohalah Karami Department of Engineering, Isfahan University of Technology, Isfahan,, Iran, Islamic Republic of
  • Parisa Sadat Emadi Department of Engineering, Isfahan University of Technology, Isfahan,, Iran, Islamic Republic of
  • Hamed Moradi Research Company APM, Kermanshah,, Iran, Islamic Republic of

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In this paper, focuses on the design of Low Noise Amplifier circuitry in the frequency band L. This circuit is designed using the 0.18 nm CMOS transistor technology, which consists of two transistor Stage. The purpose of this research is to improve the cost of: Increase Gain - Increase circuit linearization - Create an integrative matching network for system stability. The application of this circuit can be used in wireless and GPS systems. The CMOS LNA exhibits a gain greater than 23 dB from 1.1 to 2.0 GHz, and a noise figure of 2.7 to 3.3 dB from 1.2 to 2.4 GHz. At 1.575 GHz, the 1-dB compression point (P1dB) is 1.73 dBm, with an input third-order intercept point (IIP3) of -3.98 dBm. This circuit is designed using ADS software.