Design of the Low Noise Amplifier Circuit in Band L for Improve the Gain and Circuit Stability

In this paper, focuses on the design of Low Noise Amplifier circuitry in the frequency band L. This circuit is designed using the 0.18 nm CMOS transistor technology, which consists of two transistor Stage. The purpose of this research is to improve the cost of: Increase Gain Increase circuit linearization Create an integrative matching network for system stability. The application of this circuit can be used in wireless and GPS systems. The CMOS LNA exhibits a gain greater than 23 dB from 1.1 to 2.0 GHz, and a noise figure of 2.7 to 3.3 dB from 1.2 to 2.4 GHz. At 1.575 GHz, the 1 -dB compression point (P1dB) is 1.73 dBm, with an input third-order intercept point (IIP3) of -3.98 dBm. This circuit is designed using ADS software.

at the orbital altitude to the terminal at the ground. As receiving section of the front end is sensing very low magnitude signal transmitted from satellite transponder, the Low Noise Amplifier (LNA) transistor plays the most important role in receiver front end circuit. The transistor used in this paper's LNA design is BFP720ESD, a Silicon Germanium Carbon (CMOS:C) NPN Hetero junction, a wideband RF Transistor [10]. This CMOS shows very low noise figure and low power consumption meeting ideal condition for an LNA implementation. The CMOS LNA has been designed meticulously. Proposed design in this paper shows high gain (35.56dB) with very low noise figure (0.628dB) using this transistor. Modulation analysis has also been performed in this paper to gain EVM (error vector magnitude) and ACLR (adjacent channel rejection ratio) parameters with WCDMA input signal of 3.84 MHz bandwidth [11].

2-LNA Design
The LNA was implemented as a single-ended cascade amplifier [3] with a feedback network. The first stage is a common-emitter (CE) configuration and the second stage is a common-base (CB) configuration. The cascode transistor Q2 prevents the Miller effect from degrading the power gain and also improves the reverse isolation, and improves stability of the LNA. The feedback topology [5] for the LNA uses a shunt-shunt configuration with both the resistance Rfb and the capacitance Cfb connected in series. Figure 1 shows the small-signal equivalent circuit for the transistors Q1 and Q2 in a cascade configuration without feedback. Assuming that the gain at Q1 is greater Q2, the equivalent noise input current, Ini for a shunt-shunt feedback amplifier [7] is given as: For the shunt-shunt feedback amplifier, the closed-loop gain Aclose of the amplifier is given by: The amount of SNR (in, out) is as follows: The closed-loop input impedance of the feedback amplifier is given by: Where A is the open-loop gain. The closed-loop output impedance of the feedback amplifier is given by: The minimum effect of a linear network in the order of the system is expressed in Noise figure. The Rfb value is larger than the Rs with the input impedance. Figure 1 shows the small-signal equivalent circuit for the transistors Q1 and Q2 in a cascade configuration without feedback. In Figure 2, the schematic of the L-band LNA is shown. Tables 1 shows the device sizes for the LNA.

3-Simulation of LNA
The LNA was designed to operate off of a supply voltage as low as Vcc=1.5 V and Ic=11.9 mA, yielding a total power dissipation of 17.89 mW. The LNA was measured on-wafer using ground-signal-ground (GSG) coplanar microwave probes, with probe-level calibration used to account for cable losses. The LNA achieves a peak gain of 26 dB at 1.575GHz, and from 1.1-4.0 GHz, it maintains a gain above 22 dB. The reverse isolation of the LNA is more than 35 dB from 1 to 4 GHz indicating good stability. The LNA exhibits a good 50 Ω match and Figure 6 shows that the measured and simulated input return loss (S11) and the output return loss (S22) are less than -10 dB from 1.1-1.9 GHz.

4-Conclusion
In this paper, we have design and described the LNA circuit in the frequency band L. This circuit is designed with the 0.18 CMOS technology structure. The purpose of this design is to improve the quantity: Gain -Noise Figure -Linearization -Reduced power consumption and circuit stability. This circuit is also used in various wireless systems, including GPS systems and short-range satellite radio frequencies. After designing the circuit, we analyzed the quantities that these quantities were analyzed based on equations or based on the boxes specified in ADS software.

5-Acknowledgement
Research Company APM very grateful that we were in this Reserch support. Mr. Taiyeb Namdaran and Mr. Hamed Moradi research director at the company, sincerely thank.